This standard defines a mechanism for the test of core designs within a system on chip (SoC). This mechanism constitutes a hardware architecture and leverages the core test language (CTL) to facilitate communication between core designers and core integrators.
- Standard Committee
- C/TT - Test Technology
- Status
- Inactive-Reserved Standard
- PAR Approval
- 1997-06-27
- Superseded by
- 1500-2022
- Board Approval
- 2005-03-20
- History
-
- ANSI Approved:
- 2005-06-30
- Published:
- 2005-08-29
- Reaffirmed:
- 2011-03-31
- Inactivated Date:
- 2022-03-24
Working Group Details
- Society
- IEEE Computer Society
- Standard Committee
- C/TT - Test Technology
- Working Group
-
ADMIN_8220 - Project Administration_8220
- IEEE Program Manager
- Tom Thompson
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Standards approved by the IEEE SA Standards Board that are within the 10-year lifecycle.
1500-2022
IEEE Standard Testability Method for Embedded Core-based Integrated Circuits
A mechanism for the test of core designs within a system on chip (SoC) is defined. This mechanism is a hardware architecture and the core test language (CTL) is leveraged to facilitate communication between core designers and core integrators.
These standards have been replaced with a revised version of the standard, or by a compilation of the original active standard and all its existing amendments, corrigenda, and errata.
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